UDA · The architectural frame
UMA shares the substrate. UDA shares the design. The frame ThermoEdge is built under.
I · The name
Unified Design Architecture names an organizing principle, not a product. It points at the actual fact about a computer that determines how well it works: who designed it, and how much of it they designed together.
A computer with a unified memory pool, designed by one team but bolted underneath an operating system, a compiler, and a framework written by four other companies, is a system with shared memory and seven negotiated interfaces. The negotiation is the cost. Sharing memory at the silicon and re-separating it at the API leaves the cost intact.
A computer where the silicon, the language, the compiler, the runtime, and the framework were designed by the same team to fit each other has no negotiation to pay for. The layers exist as engineering decisions inside the building, not as products outside it.
UDA is the name for the second case. The technical fact — shared substrate — is necessary but not sufficient. The organizational fact — one team, one design, no public interfaces — is what actually delivers the result.
II · The principles
These are the load-bearing commitments. A design either holds them or it is not UDA.
The compiler knows the silicon. The silicon knows the language. The operating system, if it exists as a thing, is a region of the design rather than a separately-shipped product. There is no hardware abstraction layer because there is no abstraction to negotiate with strangers.
"Memory," "storage," "compute," "networking," "security" become roles within a substrate, not components of a system. The vocabulary describes engineering teams inside the building, not product categories outside it.
Data is not moved between memory and storage. Data exists at addresses, and the addresses have physical properties — speed, durability, power — that the compiler and runtime co-optimize. "Saving" is not a verb.
The unit of sale is the artifact's lifetime, not the next quarter. Components do not get replaced; the artifact gets retired and recycled. Make once, use forever, then return the substrate.
No published ISA, no exposed memory model, no standardized bus. The internal abstractions can be as clean as the team wants; they simply do not have to negotiate with the outside. The boundary moves up.
Hardware, language, compiler, runtime, application — designed together, evolved together, shipped together. No team ships in isolation because there are no isolated teams.
III · The silos that fall
Words like "storage tier," "memory hierarchy," "filesystem," "driver," "kernel," "ISA," "compiler target" are residue from an era when each layer was sold by a different company. Under UDA they become role names inside a single design.
| Role | Modular era product | Under UDA |
|---|---|---|
| Memory | DRAM module | addressable region of the substrate |
| Storage | block device | persistent region of the substrate |
| Compute | CPU / GPU socket | computational region of the substrate |
| OS | shipped product | engineering team inside the artifact |
| ISA | published interface | private implementation detail |
| Filesystem | kernel module | language-level data structure |
| Network | protocol stack | region with longer-latency addresses |
IV · ThermoEdge under UDA
ThermoEdge is the implementation of UDA for the energy axis of computing. The fabric, the compiler, and the chip are not three products. They are one design with three engineering teams.
The hardware
Five substrate columns, each performing the class of math its physics performs natively. Photonic, stochastic, reversible, neuromorphic, quantum. The substrate provides the win, not the process node.
The runtime
Dispatch every mathematical primitive to the substrate whose physics performs it at the lowest joule cost the physics admits. The compiler is the load-bearing engineering bet. Under UDA, it has to be ours, because it has to know our silicon.
The artifact
The first shipping chip. Heterogeneous RISC-V system on module with processing-in-memory, deterministic real-time, integrated radios, post-quantum security, and on-die energy harvesting. Four form factors. One design.
The Periodic Stack of Computation is the catalog: 258 mathematical primitives across 33 families, 29 already in shipping silicon somewhere in the ecosystem, 229 remaining as the roadmap. The JLandauer simulator is the cost surface: a recursive-inversion engine that reports each workload's friction-tax distance from the thermodynamic floor.
The compiler dispatches against the cost surface. The chip implements the closest pieces. The fabric carries the long roadmap. The user sees one thing: a computer whose energy bill is ninety percent smaller, with no "save," no "load," no "drive," and no "RAM."
The closing
UDA is one artifact, one design, one team. The memory/storage divide, the refresh cycle, the seven-layer software stack — under one design they stop being product boundaries and become engineering decisions inside the building. The vocabulary describes what the engineers built, not what the customer chose between. The substrate is the product.
ThermoEdge is built this way. The fabric, the compiler, and the chip are one design — which is what lets the fabric remove ninety percent of the energy bill.